concurrency-synchronization-primitives-a-module

TOP CONCEPTS

memory order relaxed atomicity guaranteeThe indivisibility guarantee that a relaxed atomic operation completes as a single indivisible step; no interm

synchronizes withA relation between atomic operations in memory models where a release fence on one thread synchronizes with an

memory order relaxedC11/C++11 memory ordering that only guarantees atomicity of the operation with no ordering constraints relativ

sequentially consistentThe strongest memory ordering requiring a single total order of all sequentially consistent operations visible

indivisibility propertyThe fundamental property that a relaxed atomic operation executes as a single indivisible step from the perspe

memory order relaxed vs acquireThe ordering contrast where acquire_semantics prevents subsequent operations from being reordered before the a

acquire semanticsMemory ordering semantics ensuring all subsequent loads/stores cannot be reordered before the acquire operatio

happens before relationA fundamental ordering relation in memory models defining that if operation A happens-before operation B, then

rmw ind 001rmw_operation: an atomic fetch_add, fetch_sub, fetch_or, fetch_and, fetch_xor, fetch_max, fetch_min, or fetch_

c11 memory modelStandard C11 specification defining memory orderings: memory_order_relaxed, memory_order_consume, memory_order

exponential backoffContention management strategy backing off exponentially after failed lock acquisition; reduces bus traffic an

seq cst global total orderA single total order of all sequentially consistent operations that is visible and agreed upon by all threads

c11 atomicThe C11/C++11 memory model defined by the ISO standard; defines six memory orders (relaxed, consume, acquire,

mutexMutual exclusion primitive providing exclusive access to a resource; supports lock/unlock operations and optio

release semanticsMemory ordering semantics ensuring all prior loads/stores cannot be reordered after the release operation; use

rlx atomicity coreThe fundamental indivisibility property that any relaxed atomic operation completes as a single non-interrupti

thundering herd contention surgeA transient spike in the rate of lock or resource acquisition attempts triggered by mass wakeup, producing que

mcs lockQueued lock where each waiting thread spins on a locally-owned node linked into a queue; cache-friendly with o

memory order acquireMemory ordering barrier ensuring all loads and stores after the barrier in program order cannot be reordered b

seq cst default atomic orderingThe default memory ordering for std::atomic operations in C11/C++11 when no memory_order is explicitly specifi